As disclosed in prior art JP-A-H11-121797 and JP-A-2002-94123, for example, a conventional surface-mounting light-emitting diode incorporates a semiconductor chip or light-emitting diode chip (light-emitting element chip) 1, which comprises, as a light source, a gallium nitride compound semiconductor, and a crystal substrate made of sapphire glass having one surface upon which a plurality of thin semiconductor layers are formed by a known metal-organic chemical vapor deposition method. Such a thin-layer laminate, as shown in FIGS. 1(a) and 1(b), has a double hetero structure including a crystal substrate 1a, rectangular as viewed in plan and made of a transparent sapphire glass, upon which a GaN buffer layer 1b, an n-type GaN layer 1c, an InGaN activation layer 1d, a p-type AlGaN layer 1e and a p-type GaN layer 1f are stacked in this order.
At one corner (vertex portion) of the n-type GaN layer 1c mentioned above, an upper portion is removed by etching to provide a step-like configuration. In this removed portion, a p-type electrode 2 (referred to as the “first electrode” below) is formed by vapor deposition, the electrode comprising a laminate of Ti and Au layers and another laminate of Ni and Au layers stacked on the first laminate. In a portion other than the etched-away portion, the upper surface of the uppermost p-type GaN layer if is provided with a p-type electrode 3 (referred to as the “second electrode” below) comprising a laminate of Ni and Au layers and produced by vapor deposition like the above.
According to the prior art technique, a bump made of gold (Au) is formed on each of the first electrode 2 and the second electrode 3 of the light-emitting element chip 1. These bumps are fixed to a pair of external connection electrodes formed on a chip-type circuit substrate.
However, the production cost tends to be unduly high since the bumps are made of gold (Au). Another problem results from the way in which the light-emitting chip 1 (semiconductor chip) is pressed against the circuit substrate and connected to the external connection electrodes via the bumps. In this manner, the light-emitting chip is fixed to the circuit substrate, with its original posture remaining as it comes close to the substrate, so that the mounting-posture variation described below cannot be corrected.
In place of such metal bumps, it was proposed to use a thermally meltable die-bonding agent, such as solder paste, for connection. Specifically, an appropriate amount of die-bonding agent is applied to the external connection electrodes of the circuit substrate, and the semiconductor chip is placed onto the applied die-bonding agent. In this state, the die-bonding agent is heated to melt, and then caused to solidify. This method, however, gives rise to the following problems.
As noted above, the die-bonding agent applied to the external connection electrodes is heated to melt. At this time, the agent spreads in all directions over each electrode. The semiconductor chip, supported on the melted die-bonding agent, tends to deviate laterally from the prescribed center over the connection electrodes, and thereafter the chip is fixed to the electrodes at the off-center position upon solidifying of the die-bonding agent.
In this connection, it should be noted that each of the conventional external connection electrodes formed on the circuit substrate has a large surface area, and hence an unacceptably gross deviation can result.
Further, supposing that the semiconductor chip is placed on the external connection electrodes, with the right and left edges of the rectangular semiconductor chip being held in non-parallel condition (slant condition) relative to the right and left edges of the rectangular circuit substrate, the slant posture is not corrected, and therefore the fixing to the external connection electrodes is performed in the non-parallel condition.
Accordingly, when the semiconductor chip, die-bonded to the external connection electrodes of the circuit substrate, is covered by mold packaging of a synthetic resin, it is necessary to consider two cases, i.e. the off-center deviation of the semiconductor chip to be packaged and the non-parallel relationship between the edges of the chip and the edges of the circuit substrate. In either case, the mold needs to be large to ensure proper packaging, and this makes the semiconductor device unduly large and heavy.
In particular, when the semiconductor device is a chip LED comprising a light-emitting diode chip and a transparent synthetic resin modle, the off-center deviation of the semiconductor chip and the non-parallel relationship between the diode chip's edges and the circuit substrate's edges make different the emitting directions of light from diode chips, resulting in undesired variations in directivity of light.
The technical object of the present invention is to solve the above-described problems.